基本信息：
林智锋，博士，硕导，2022年7月入职88038威尼斯。主要研究方向为集成电路电子设计自动化（EDA）。在EDA领域的主要会议/期刊（例如：DAC，DATE，TCAD等）发表论文十余篇，包括领域顶会DAC 4篇和顶刊TCAD 4篇。申请和授权国家发明专利10余项。曾获得研究生电子设计竞赛全国一等奖，“互联网+”大学生创新创业大赛全国金奖，以及国际集成电路计算机辅助设计竞赛（CAD Contest @ ICCAD）全球第二名等
科研项目：
1．威尼斯登录入口welcome人才基金项目，面向先进制程的集成电路布局问题研究 （XRC-22070），10万，2022.11-2024.11，主持
2．国家自然科学基金面上项目，先进制程技术下的VLSI混合行高单元布局研究（61977017），59万，2020.01-2023.12，参与
3．国家重点研发计划课题，大规模超低电压设计时序分析并行化技术研究（2018YFB2202704），70万，2019.08-2022.07，参与
主要论著：
1. Peng Zou, Guohao Chen, Zhifeng Lin, Jun Yu and Jianli Chen, Toward Optimal Filler Cell Insertion with Complex Implant Layer Constraints, ACM/IEEE Design Automation Conference, San Francisco, July 09-13, 2023. (CCF-A)
2. Peng Zou, Zhijie Cai, Zhifeng Lin, Chenyue Ma, Jun Yu, Jianli Chen, Incremental 3D Global Routing Considering Cell Movement and Complex Routing Constraints, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Early Access, 2023. (CCF-A)
3. Zhifeng Lin, Yanyue Xie, Peng Zou, Sifei Wang, Jun Yu and Jianli Chen, An Incremental Placement Flow for Advanced FPGAs with Timing Awareness, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40(9):3092-3103, 2022. (CCF-A)
4. Zhifeng Lin, Zhenghua Gu, Zhipeng Huang, Xiqiong Bai, Lixuan Luo, Geng Lin, Hotspot Detection with Machine Learning Based on Pixel-Based Feature Extraction, Scientific Programming, 1-11, 2022.
5. Jianli Chen, Zhifeng Lin, Yanyue Xie, Wenxin Zhu and Yao-Wen Chang, Mixed-cell-height Placement with Complex Minimum-Implant-Area Constraints, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(11): 4639-4652, 2022. (CCF-A)
6. Zhifeng Lin, Yanyue Xie, Gang Qian, Jianli Chen, Sifei Wang, Jun Yu and Yao-Wen Chang, Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints, IEEE/ACM Design, Automation and Test in Europe, Grenoble, Feb. 01-05, 2021. (CCF-B)
7. Peng Zou, Zhifeng Lin, Chenyue Ma, Jun Yu and Jianli Chen, Late Breaking Results: Incremental 3D Global Routing Considering Cell Movement, ACM/IEEE Design Automation Conference, San Francisco, Dec. 5-9, 2021. (CCF-A)
8. Zhifeng Lin, Yanyue Xie, Gang Qian, Sifei Wang, Jun Yu and Jianli Chen, Late Breaking Results: An Analytical Timing-Driven Placer for Heterogeneous FPGAs, ACM/IEEE Design Automation Conference, San Francisco, July 19-23, 2020. (CCF-A)
9. Jianli Chen, Zhifeng Lin, Yun-Chih Kuo, Chau-Chin Huang, Yao-Wen Chang, Shih-Chun Chen, Chun-Han Chiang, and Sy-Yen Kuo, Clock-Aware Placement for Large-Scale Heterogeneous FPGAs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(12):5042-5055, 2020. (CCF-A)
10. Peng Zou, Zhifeng Lin, Xiao Shi, Yingjie Wu, Jianli Chen, Jun Yu, and Yao-Wen Chang, Time-Division Multiplexing Based System-Level FPGA Routing for Logic Verification, ACM/IEEE Design Automation Conference, San Francisco, July 19-23, 2020. (CCF-A)
11. Zhifeng Lin and Zhihua Huang, Recognition of ErrP in P300 Speller Based on Time Series Pattern, IEEE International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, Beijing, Oct. 13-15, 2019.
12. Zhifeng Lin and Zhihua Huang, Research on event-related potentials in motor imagery BCI, IEEE International Congress on Image and Signal Processing, BioMedical Engineering and Informatics, Shanghai, Oct. 14-16, 2018.
